Instruction Fetch; Address Space - Renesas H8SX/1650 Hardware Manual

Renesas 32-bit cisc microcomputer h8sx family / h8sx/1600 series
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2.3

Instruction Fetch

The H8SX CPU has two modes for instruction fetch: 16-bit and 32-bit modes. It is recommended
that the mode should be set according to the bus width of the memory in which the program is
stored.
The instruction-fetch mode setting does not affect operation other than instruction fetch such as
data accesses. The FETCHMD bit in SYSCR selects one of the two modes. For details, see section
3.2.2, System Control Register (SYSCR).
2.4

Address Space

Figure 2.8 shows a memory map of the H8SX CPU. The address space differs depending on the
operating mode.
Normal mode
H'0000
Program area
Data area
(64 Kbytes)
H'FFFF
Middle mode
H'000000
H'007FFF
Program area
(16 Mbytes)
Data area
(64 Kbytes)
H'FF8000
H'FFFFFF
Figure 2.8 Memory Map
Advanced mode
H'00000000
H'00FFFFFF
H'FFFFFFFF
Rev.2.00 Jun. 28, 2007 Page 23 of 666
Section 2 CPU
Maximum mode
H'00000000
Program area
(16 Mbytes)
Data area
(4 Gbytes)
H'FFFFFFFF
REJ09B0311-0200
Program area
Data area
(4 Gbytes)

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