Repeat Transfer Mode - Renesas H8SX/1650 Hardware Manual

Section 7 Data Transfer Controller (DTC)
Transfer source data area Transfer destination data area
SAR DAR
Transfer
Figure 7.7 Memory Map in Normal Transfer Mode
7.5.5

Repeat Transfer Mode

In repeat transfer mode, one operation transfers one byte, one word, or one longword of data. By
the DTS bit in MRB, either the source or destination can be specified as a repeat area. From 1 to
256 transfers can be specified. When the specified number of transfers ends, the transfer counter
and address register specified as the repeat area is restored to the initial state, and transfer is
repeated. The other address register is then incremented, decremented, or left fixed. In repeat
transfer mode, the transfer counter (CRAL) is updated to the value specified in CRAH when
CRAL becomes H'00. Thus the transfer counter value does not reach H'00, and therefore a CPU
interrupt cannot be requested when DISEL = 0.
Table 7.7 lists the register function in repeat transfer mode. Figure 7.8 shows the memory map in
repeat transfer mode.
Rev.2.00 Jun. 28, 2007 Page 237 of 666
REJ09B0311-0200