Renesas H8SX/1650 Hardware Manual page 353

Renesas 32-bit cisc microcomputer h8sx family / h8sx/1600 series
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Table 9.23 TIOR_1
Bit 3
Bit 2
Bit 1
IOA3
IOA2
IOA1
0
0
0
0
0
0
0
0
1
0
0
1
0
1
0
0
1
0
0
1
1
0
1
1
1
0
0
1
0
0
1
0
1
1
1
X
[Legend]
X:
Don't care
Bit 0
TGRA_1
IOA0
Function
0
Output
compare
1
register
0
1
0
1
0
1
0
Input
capture
register
1
X
X
Section 9 16-Bit Timer Pulse Unit (TPU)
Description
TIOCA1 Pin Function
Output disabled
Initial output is 0 output
0 output at compare match
Initial output is 0 output
1 output at compare match
Initial output is 0 output
Toggle output at compare match
Output disabled
Initial output is 1 output
0 output at compare match
Initial output is 1 output
1 output at compare match
Initial output is 1 output
Toggle output at compare match
Capture input source is TIOCA1 pin
Input capture at rising edge
Capture input source is TIOCA1 pin
Input capture at falling edge
Capture input source is TIOCA1 pin
Input capture at both edges
Capture input source is TGRA_0 compare
match/input capture
Input capture at generation of channel 0/TGRA_0
compare match/input capture
Rev.2.00 Jun. 28, 2007 Page 331 of 666
REJ09B0311-0200

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