15.1
Features
• 8-bit resolution
• Two output channels
• Maximum conversion time of 10 µs (with 20 pF load)
• Output voltage of 0 V to V
• D/A output hold function in software standby mode
• Module stop state specifiable
Section 15 D/A Converter
ref
Module data bus
Vref
AV
CC
8-bit
D/A
DA1
DA0
AV
SS
Control circuit
[Legend]
DADR0: D/A data register 0
DADR1: D/A data register 1
DACR01: D/A control register 01
Figure 15.1 Block Diagram of D/A Converter
Section 15 D/A Converter
Internal data bus
Rev.2.00 Jun. 28, 2007 Page 545 of 666
REJ09B0311-0200