Renesas H8SX/1650 Hardware Manual page 415

Renesas 32-bit cisc microcomputer h8sx family / h8sx/1600 series
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• NDERH
Bit
Bit Name
7
NDER15
6
NDER14
5
NDER13
4
NDER12
3
NDER11
2
NDER10
1
NDER9
0
NDER8
• NDERL
Bit
Bit Name
7
NDER7
6
NDER6
5
NDER5
4
NDER4
3
NDER3
2
NDER2
1
NDER1
0
NDER0
Initial
Value
R/W
Description
0
R/W
Next Data Enable 15 to 8
0
R/W
When a bit is set to 1, the value in the corresponding
NDRH bit is transferred to the PODRH bit by the selected
0
R/W
output trigger. Values are not transferred from NDRH to
0
R/W
PODRH for cleared bits.
0
R/W
0
R/W
0
R/W
0
R/W
Initial
Value
R/W
Description
0
R/W
Next Data Enable 7 to 0
0
R/W
When a bit is set to 1, the value in the corresponding
NDRL bit is transferred to the PODRL bit by the selected
0
R/W
output trigger. Values are not transferred from NDRL to
0
R/W
PODRL for cleared bits.
0
R/W
0
R/W
0
R/W
0
R/W
Section 10 Programmable Pulse Generator (PPG)
Rev.2.00 Jun. 28, 2007 Page 393 of 666
REJ09B0311-0200

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