Renesas H8SX/1650 Hardware Manual page 654

Section 20 Electrical Characteristics
Bφ
A23 to A0
CS7 to CS0
AS
BS
RD/WR
Read
RD
(RDNn = 1)
D15 to D0
RD/WR
Read
RD
(RDNn = 0)
D15 to D0
RD/WR
LHWR, LLWR
Write
D15 to D0
Figure 20.12 Basic Bus Timing: 3-State Access (CS Assertion Period Extended)
Rev.2.00 Jun. 28, 2007 Page 632 of 666
REJ09B0311-0200
T T
h
t
AD
t
CSD1
t
AS1
t
ASD
t
BSD
t
BSD
t
RWD
t
AS3
t
RWD
t
AS3
t
RWD
t
AS4
t
WDS3
t
WDD
T
1 2
t t
RSD1 RSD1
t
t
RDS1
AC6
t
RSD1
t
AC4
t
WRD2
t
WRD1
t
WSW2
T T
3 t
t
t AH1
ASD
t
t
AH3
t
RDH1
t
AH2
t
RSD2
t t
RDS2 RDH2
t
t
AH3
t
WDH3
RWD
t
RWD
RWD