I/O Pins Used For Byte Control Sram Interface - Renesas H8SX/1650 Hardware Manual

Section 6 Bus Controller (BSC)
6.7.3

I/O Pins Used for Byte Control SRAM Interface

Table 6.16 shows the pins used for the byte control SRAM interface.
In the byte control SRAM interface, write strobe signals (LHWR and LLWR) are output from the
byte select strobes. The RD/WR signal is used as a write enable signal.
Table 6.16 I/O Pins for Byte Control SRAM Interface
When Byte Control
Pin SRAM is Specified Name
AS/AH AS
CSn CSn
RD RD
RD/WR RD/WR
LHWR/LUB LUB
LLWR/LLB LLB
WAIT WAIT
A23 to A0 A23 to A0
D15 to D0 D15 to D0
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I/O
Address Output Strobe signal indicating that the address
strobe
Chip select Output Strobe signal indicating that area n is
Read strobe Output Output enable for the SRAM when the
Read/write Output Write enable signal for the SRAM when
Lower-upper Output Upper byte select when the 16-bit byte
byte select
Lower-lower Output Lower byte select when the 16-bit byte
byte select
Wait Input
Address pin Output Address output pin
Data pin Input/
output
Function
output on the address bus is valid when
a basic bus interface space or byte
control SRAM space is accessed
selected
byte control SRAM space is accessed
the byte control SRAM space is
accessed
control SRAM space is accessed
control SRAM space is accessed
Wait request signal used when an
external address space is accessed
Data input/output pin