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Output
Specification
Port
Signal Name
PF
7
A23_OE
CS4C_OE
CS5C_OE
CS6C_OE
CS7C_OE
6
A22_OE
CS6D_OE
5
A21_OE
CS5D_OE
4
A20_OE
3
A19_OE
2
A18_OE
1
A17_OE
0
A16_OE
PH
7
D7_E
6
D6_E
5
D5_E
4
D4_E
3
D3_E
2
D2_E
1
D1_E
0
D0_E
PI
7
D15_E
6
D14_E
5
D13_E
4
D12_E
3
D11_E
2
D10_E
1
D9_E
0
D8_E
Output
Signal
Signal Selection
Name
Register Settings
A23
CS4
CS5
CS6
CS7
A22
CS6
A21
CS5
A20
A19
A18
A17
A16
D7
D6
D5
D4
D3
D2
D1
D0
D15
D14
D13
D12
D11
D10
D9
D8
Peripheral Module Settings
PFCR4.A23E = 1
PFCR1.CS4S[A,B] = 10
PFCR0.CS4E = 1
PFCR1.CS5S[A,B] = 10
PFCR0.CS5E = 1
PFCR1.CS6S[A,B] = 10
PFCR0.CS6E = 1
PFCR1.CS7S[A,B] = 10
PFCR0.CS7E = 1
PFCR4.A22E = 1
PFCR1.CS6S[A,B] = 11
PFCR4.A21E = 1
PFCR1.CS5S[A,B] = 11
PFCR0.CS5E = 1
ABWCR.ABW[H,L]n = 01
ABWCR.ABW[H,L]n = 01
ABWCR.ABW[H,L]n = 01
ABWCR.ABW[H,L]n = 01
ABWCR.ABW[H,L]n = 01
ABWCR.ABW[H,L]n = 01
ABWCR.ABW[H,L]n = 01
ABWCR.ABW[H,L]n = 01
Rev.2.00 Jun. 28, 2007 Page 291 of 666
Section 8 I/O Ports
PFCR0.CS6E = 1
REJ09B0311-0200
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