Register Description; System Clock Control Register (Sckcr) - Renesas H8SX/1650 Hardware Manual

Section 17 Clock Pulse Generator
17.1

Register Description

The clock pulse generator has the following register.

• System clock control register (SCKCR)

17.1.1 System Clock Control Register (SCKCR)
SCKCR controls Bφ clock output and frequencies of the system, peripheral module, and external
bus clocks.
Bit 15
Bit Name PSTOP1
Initial Value 0
R/W R/W
Bit 7

Bit Name
Initial Value 0
R/W R/W
Bit Bit Name
15 PSTOP1
14 to 11 
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14 13
 
0 0
R/W R/W
6 5
PCK2 PCK1
0 1
R/W R/W
Initial
Value R/W Description
0 R/W Bφ Output Select
Controls Bφ output on PA7.
•
0: Bφ output
1: Fixed high
All 0 R/W Reserved
These bits are always read as 0. The write value should
always be 0.
12 11
 
0 0
R/W R/W
4 3

PCK0
0 0
R/W R/W
Normal operation
10 9
ICK2 ICK1
0 1
R/W R/W
2 1
BCK2 BCK1
0 1
R/W R/W
8
ICK0
0
R/W
0
BCK0
0
R/W