Port 2 - Renesas H8SX/1650 Hardware Manual

(8)
P10/TxD2/IRQ0-A
The pin function is switched as shown below according to the combination of the SCI register
setting and P10DDR bit setting.
Module Name Pin Function
SCI TxD2 output
I/O port P10 output
P10 input (initial setting) 0
8.2.2

Port 2

(1)
P27/PO7/TIOCA5/TIOCB5
The pin function is switched as shown below according to the combination of the TPU and PPG
register settings and P27DDR bit setting.
Module Name Pin Function
TPU TIOCB5 output
PPG PO7 output
I/O port P27 output
P27 input
(initial setting)
SCI
TxD2_OE
1
0
TPU PPG
TIOCB5_OE PO7_OE

1
0 1
0 0
0 0
Section 8 I/O Ports
Setting
I/O Port
P10DDR

1
0
Setting
I/O Port
P27DDR


1
0
Rev.2.00 Jun. 28, 2007 Page 265 of 666
REJ09B0311-0200