Renesas H8SX/1650 Hardware Manual page 364

Renesas 32-bit cisc microcomputer h8sx family / h8sx/1600 series
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Section 9 16-Bit Timer Pulse Unit (TPU)
Bit
Bit Name
0
TGFA
Note:
Only 0 can be written to clear the flag.
*
Rev.2.00 Jun. 28, 2007 Page 342 of 666
REJ09B0311-0200
Initial
value
R/W
Description
0
R/(W)* Input Capture/Output Compare Flag A
Status flag that indicates the occurrence of TGRA input
capture or compare match.
[Setting conditions]
[Clearing conditions]
When TCNT = TGRA while TGRA is functioning as
output compare register
When TCNT value is transferred to TGRA by input
capture signal while TGRA is functioning as input
capture register
When DTC is activated by a TGIA interrupt while the
DISEL bit in MRB of DTC is 0
When 0 is written to TGFA after reading TGFA = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure
to read the flag after writing 0 to it.)

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