Irq Enable Register (Ier) - Renesas H8SX/1650 Hardware Manual

Section 5 Interrupt Controller
Bit Bit Name
6 IPR6
5 IPR5
4 IPR4

3
2 IPR2
1 IPR1
0 IPR0
5.3.4

IRQ Enable Register (IER)

IER enables or disables interrupt requests IRQ11 to IRQ0.
Bit 15

Bit Name
Initial Value 0
R/W R/W
Bit 7
Bit Name IRQ7E
Initial Value 0
R/W R/W
Rev.2.00 Jun. 28, 2007 Page 92 of 666
REJ09B0311-0200
Initial
Value R/W Description
1 R/W Sets the priority level of the corresponding interrupt
source.
1 R/W
000: Priority level 0 (lowest)
1 R/W
001: Priority level 1
010: Priority level 2
011: Priority level 3
100: Priority level 4
101: Priority level 5
110: Priority level 6
111: Priority level 7 (highest)
0 R Reserved
This is a read-only bit and cannot be modified.
1 R/W Sets the priority level of the corresponding interrupt
source.
1 R/W
000: Priority level 0 (lowest)
1 R/W
001: Priority level 1
010: Priority level 2
011: Priority level 3
100: Priority level 4
101: Priority level 5
110: Priority level 6
111: Priority level 7 (highest)
14 13
 
0 0
R/W R/W
6 5
IRQ6E IRQ5E
0 0
R/W R/W
12 11

IRQ11E IRQ10E
0 0
R/W R/W
4 3
IRQ4E IRQ3E
0 0
R/W R/W
10 9
IRQ9E
0 0
R/W R/W
2 1
IRQ2E IRQ1E
0 0
R/W R/W
8
IRQ8E
0
R/W
0
IRQ0E
0
R/W