Port Function Control Register 2 (Pfcr2) - Renesas H8SX/1650 Hardware Manual

Section 8 I/O Ports
Bit Bit Name
1 CS4SA*
0 CS4SB*
If multiple CS outputs are specified to a single pin according to the CSn output pin
Note:
*
select bits (n = 4 to 7), multiple CS signals are output from the pin. For details, see
section 6.5.3, Chip Select Signals.
8.3.3

Port Function Control Register 2 (PFCR2)

PFCR1 selects the CS output pin, enables/disables bus control I/O, and selects the bus control I/O
pins.
Bit 7

Bit Name
Initial Value 0
R/W R/W
Bit Bit Name

7
1
6 CS2S*
5 BSS
Rev.2.00 Jun. 28, 2007 Page 294 of 666
REJ09B0311-0200
Initial
Value R/W Description
CS4 Output Pin Select
0 R/W
Selects the output pin for CS4 when CS4 output is
0 R/W
enabled (CS4E = 1)
00: Specifies pin PB0 as CS4-A output
01: Setting prohibited
10: Specifies pin PF7 as CS4-C output
11: Setting prohibited
6 5
CS2S BSS
0 0
R/W R/W
Initial
Value R/W Description
0 R/W Reserved
This bit is always read as 0. The write value should
always be 0.
CS2 Output Pin Select
0 R/W
Selects the output pin for CS2 when CS2 output is
enabled (CS2E = 1)
0: Specifies pin PB2 as CS2-A output pin
1: Specifies pin PB1 as CS2-B output pin
BS Output Pin Select
0 R/W
Selects the BS output pin
0: Specifies pin PA0 as BS-A output pin
1: Specifies pin PA6 as BS-B output pin
4 3

BSE RDWRE
0 0
R/W R/W
2 1
ASOE
0 1
R/W R/W
0

0
R/W