Renesas H8SX/1650 Hardware Manual page 590

Renesas 32-bit cisc microcomputer h8sx family / h8sx/1600 series
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Section 18 Power-Down States
Bit
Bit Name
7
SLPIE
6 to 0
Rev.2.00 Jun. 28, 2007 Page 568 of 666
REJ09B0311-0200
Initial
Value
R/W
Description
0
R/W
Sleep Instruction Exception Handling Enable
Selects whether the execution of a SLEEP instruction
causes sleep instruction exception handling or causes a
transition to the power-down state.
0: The execution of a SLEEP instruction causes a
1: The execution of a SLEEP instruction initiates sleep
All 0
R/W
Reserved
These bits are always read as 0. The write value should
always be 0.
transition to the power-down state.
instruction exception handling. After execution of the
sleep instruction exception handling, this bit remains
set to 1. Writing 0 clears this bit.

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