Renesas H8SX/1650 Hardware Manual page 70

Section 2 CPU
Table 2.11 System Control Instructions
Instruction Size

TRAPA

RTE

RTE/L

SLEEP
LDC B/W
L
STC B/W
L
ANDC B
ORC B
XORC B

NOP
Rev.2.00 Jun. 28, 2007 Page 48 of 666
REJ09B0311-0200
Function
Starts trap-instruction exception handling.
Returns from an exception-handling routine.
Returns from an exception-handling routine, restoring data from the stack
to general registers.
Causes a transition to a power-down state.
#IMM → CCR, (EAs) → CCR, #IMM → EXR, (EAs) → EXR
Loads immediate data or the contents of a general register or a memory
location to CCR or EXR. Although CCR and EXR are 8-bit registers,
word-size transfers are performed between them and memory. The upper
eight bits are valid.
Rs → VBR, Rs → SBR
Transfers the general register contents to VBR or SBR.
CCR → (EAd), EXR → (EAd)
Transfers CCR or EXR contents to a general register or memory.
Although CCR and EXR are 8-bit registers, word-size transfers are
performed between them and memory. The upper eight bits are valid.
VBR → Rd, SBR → Rd
Transfers the contents of VBR or SBR to a general register.
CCR ∧ #IMM → CCR, EXR ∧ #IMM → EXR
Logically ANDs the CCR or EXR contents with immediate data.
CCR ∨ #IMM → CCR, EXR ∨ #IMM → EXR
Logically ORs the CCR or EXR contents with immediate data.
CCR ⊕ #IMM → CCR, EXR ⊕ #IMM → EXR
Logically exclusive-ORs the CCR or EXR contents with immediate data.
PC + 2 → PC
Only increments the program counter.