Renesas H8SX/1650 Hardware Manual page 251

Upper: DTCVBR
Lower: H'400 + vector number × 4
Figure 7.3 Correspondence between DTC Vector Address and Transfer Information
Table 7.1 shows correspondence between the DTC activation source and vector address.
Table 7.1 Interrupt Sources, DTC Vector Addresses, and Corresponding DTCEs
Origin of
Activation Source
External pin
A/D
Vector table
DTC vector
address
Transfer information (1)
start address
+4
Transfer information (2)
start address
+4n
Transfer information (n)
start address
Activation Vector
Source Number
IRQ0 64
IRQ1 65
IRQ2 66
IRQ3 67
IRQ4 68
IRQ5 69
IRQ6 70
IRQ7 71
IRQ8 72
IRQ9 73
IRQ10 74
IRQ11 75
ADI 86
Section 7 Data Transfer Controller (DTC)
:
:
:
4 bytes
DTC Vector
Address Offset
H'500
H'504
H'508
H'50C
H'510
H'514
H'518
H'51C
H'520
H'524
H'528
H'52C
H'558
Rev.2.00 Jun. 28, 2007 Page 229 of 666
Transfer information (1)
Transfer information (2)
:
:
:
Transfer information (n)
DTCE* Priority
DTCEA15 High
DTCEA14
DTCEA13
DTCEA12
DTCEA11
DTCEA10
DTCEA9
DTCEA8
DTCEA7
DTCEA6
DTCEA5
DTCEA4
DTCEB15 Low
REJ09B0311-0200