Renesas H8SX/1650 Hardware Manual page 651

Bφ
A23 to A0
CS7 to CS0
AS
BS
RD/WR
Read
RD
(RDNn = 1)
D15 to D0
RD/WR
Read
RD
(RDNn = 0)
D15 to D0
RD/WR
LHWR, LLWR
Write
D15 to D0
Figure 20.9 Basic Bus Timing: 3-State Access
T
1
t
AD
t
CSD1
t
AS1
t
ASD
t
BSD
t
BSD
t
RWD
t
AS1
t
RSD1
t
t
AA4
t
RWD
t
AS1
t
RSD1
t
RWD
t
AS2
t
WDS1
t
WDD
Section 20 Electrical Characteristics
T T
2 3
t
AH1
t
ASD
t
RSD1
t t
RDS1 RDH1
AC6
t
t
RDS2
AC4
t
AA5
t
AH1
t
t
WRD2
WRD1
t
t
WDH1
WSW2
Rev.2.00 Jun. 28, 2007 Page 629 of 666
t
RWD
t
RWD
t
RSD2
t
RDH2
t
RWD
REJ09B0311-0200