Data Register (Pndr) (N = 1 To 3, 6, A, B, D To F, H, And I); Port Register (Portn) (N = 1 To 3, 5, 6, A, B, D To F, H, And I) - Renesas H8SX/1650 Hardware Manual

8.1.2

Data Register (PnDR) (n = 1 to 3, 6, A, B, D to F, H, and I)

DR is an 8-bit readable/writable register that stores the output data of the pins to be used as the
general output port.
The initial value of DR is H'00.
Bit 7
Bit Name
Pn7DR
Initial Value 0
R/W R/W
Note: The lower six bits are valid and the upper two bits are reserved for port 6 registers.
The lower four bits are valid and the upper four bits are reserved for port B registers.
8.1.3

Port Register (PORTn) (n = 1 to 3, 5, 6, A, B, D to F, H, and I)

PORT is an 8-bit read-only register that reflects the port pin status. A write to PORT is invalid.
When PORT is read, the DR bits that correspond to the respective DDR bits set to 1 are read and
the status of each pin whose corresponding DDR bit is cleared to 0 is also read regardless of the
ICR value.
The initial value of PORT is undefined and is determined based on the port pin status.
Bit 7
Bit Name Pn7
Initial Value Undefined
R/W R
Note: The lower six bits are valid and the upper two bits are reserved for port 6 registers.
The lower four bits are valid and the upper four bits are reserved for port B registers.
6 5
Pn6DR Pn5DR
0 0
R/W R/W
6 5
Pn6 Pn5
Undefined Undefined
R R
4 3
Pn4DR Pn3DR
0 0
R/W R/W
4 3
Pn4 Pn3
Undefined Undefined
R R
Rev.2.00 Jun. 28, 2007 Page 259 of 666
Section 8 I/O Ports
2 1
Pn2DR Pn1DR
0 0
R/W R/W
2 1
Pn2 Pn1
Undefined Undefined
R R
REJ09B0311-0200
0
Pn0DR
0
R/W
0
Pn0
Undefined
R