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Section 6 Bus Controller (BSC)
6.2.12
Address/Data Multiplexed I/O Control Register (MPXCR)
MPXCR specifies the address/data multiplexed I/O interface.
Bit
15
Bit Name
MPXE7
Initial Value
0
R/W
R/W
Bit
7
Bit Name
Initial Value
0
R/W
R
Bit
Bit Name
15
MPXE7
14
MPXE6
13
MPXE5
12
MPXE4
11
MPXE3
10 to 1
0
ADDEX
Rev.2.00 Jun. 28, 2007 Page 144 of 666
REJ09B0311-0200
14
13
MPXE6
MPXE5
0
0
R/W
R/W
6
5
0
0
R
R
Initial
Value
R/W
Description
0
R/W
Address/Data Multiplexed I/O Interface Select
0
R/W
Specifies the bus interface for the corresponding area.
0
R/W
When setting the area n bit to 1, clear the BCSELn bit in
SRAMCR to 0.
0
R/W
0: Area n is specified as a basic interface or a byte
0
R/W
1: Area n is specified as an address/data multiplexed I/O
(n = 7 to 3)
All 0
R
Reserved
These are read-only bits and cannot be modified.
0
R/W
Address Output Cycle Extension
Specifies whether a wait cycle is inserted for the address
output cycle of address/data multiplexed I/O interface.
0: No wait cycle is inserted for the address output cycle
1: One wait cycle is inserted for the address output cycle
12
11
MPXE4
MPXE3
0
0
R/W
R/W
4
3
0
0
R
R
control SRAM interface.
interface
10
9
0
0
R
R
2
1
ADDEX
0
0
R
R
R/W
8
0
R
0
0
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