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HARDWARE
FUNCTION BLOCK OPERATIONS
(8) A-D conversion timing chart
Figure 27 shows the A-D conversion timing chart.
ADST instruction
A-D conversion
completion flag (ADF)
DAC operation signal
Fig. 27 A-D conversion timing chart
(9) How to use A-D conversion
How to use A-D conversion is explained using as example in which
the analog input from P4
/A
0
order 4 bits of the converted data are stored in address M(Z, X, Y)
= (0, 0, 0), the middle-order 4 bits in address M(Z, X, Y) = (0, 0, 1),
and the low-order 2 bits in address M(Z, X, Y) = (0, 0, 2) of RAM.
The A-D interrupt is not used in this example.
After selecting the A
pin function with the bit 0 of the register
IN4
Q2, select A
pin and A-D conversion mode with the register
IN4
Q1 (refer to Figure 28).
Execute the ADST instruction and start A-D conversion.
Examine the state of ADF flag with the SNZAD instruction to de-
termine the end of A-D conversion.
Transfer the low-order 2 bits of converted data to the high-order
2 bits of register A (TALA instruction).
Transfer the contents of register A to M (Z, X, Y) = (0, 0, 2).
Transfer the high-order 8 bits of converted data to registers A
and B (TABAD instruction).
Transfer the contents of register A to M (Z, X, Y) = (0, 0, 1).
Transfer the contents of register B to register A, and then, store
into M(Z, X, Y) = (0, 0, 0).
1-44
pin is A-D converted, and the high-
IN4
4513/4514 Group User's Manual
62 machine cycles
(Bit 3)
(Bit 0)
0
(Bit 3)
(Bit 0)
1
0
:
Set an arbitrary value
Fig. 28 Setting registers
1
A-D control register Q2
A
function selected
IN4
A-D conversion mode
0
A-D control register Q1
A
pin selected
IN4
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