External Trigger Input Timing; Figure 15.6 External Trigger Input Timing; Table 15.3 A/D Conversion Characteristics (Single Mode); Table 15.4 A/D Conversion Characteristics (Scan Mode) - Renesas H8SX/1500 Series Hardware Manual

Section 15 A/D Converter

Table 15.3 A/D Conversion Characteristics (Single Mode)

Item Symbol Min. Typ. Max.
A/D conversion t
D
start delay time
Input sampling time t
SPL
A/D conversion t
CONV
time
Note: Values in the table are the number of states.

Table 15.4 A/D Conversion Characteristics (Scan Mode)

CKS1
0
1
15.4.4

External Trigger Input Timing

A/D conversion can be externally triggered. When the TRGS1 and TRGS0 bits are set to B'11 in
ADCR, an external trigger is input from the ADTRG pin. A/D conversion starts when the ADST
bit in ADCSR is set to 1 on the falling edge of the ADTRG pin. Other operations, in both single
and scan modes, are the same as when the ADST bit has been set to 1 by software. Figure 15.6
shows the timing.
Pφ
ADTRG
Internal trigger signal
ADST
Rev. 3.00 Mar. 14, 2006 Page 560 of 804
REJ09B0104-0300
CKS1 = 0
CKS0 = 0

18 33
 
127

515 530
CKS0
0
1
0
1

Figure 15.6 External Trigger Input Timing

CKS0 = 1
Min. Typ. Max. Min. Typ. Max.

10 17 6
  
63

259 266 131
Conversion Time (Number of States)
512 (Fixed)
256 (Fixed)
128 (Fixed)
64 (Fixed)
A/D conversion
CKS1 = 1
CKS0 = 0 CKS0 = 1
Min. Typ. Max.
 
9 4
 
31 15
 
134 67
5

68