External Trigger Input Timing; Figure 15.6 External Trigger Input Timing; Table 15.3 A/D Conversion Characteristics (Single Mode); Table 15.4 A/D Conversion Characteristics (Scan Mode) - Renesas H8SX/1520 Series Hardware Manual

Section 15 A/D Converter

Table 15.3 A/D Conversion Characteristics (Single Mode)

Item
A/D conversion
start delay time
Input sampling time t
A/D conversion
time
Note: Values in the table are the number of states.

Table 15.4 A/D Conversion Characteristics (Scan Mode)

CKS1
0
1
15.4.4

External Trigger Input Timing

A/D conversion can be externally triggered. When the TRGS1 and TRGS0 bits are set to B'11 in
ADCR, an external trigger is input from the ADTRG pin. A/D conversion starts when the ADST
bit in ADCSR is set to 1 on the falling edge of the ADTRG pin. Other operations, in both single
and scan modes, are the same as when the ADST bit has been set to 1 by software. Figure 15.6
shows the timing.
Rev. 3.00 Mar. 14, 2006 Page 560 of 804
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CKS0 = 0
Symbol Min. Typ. Max.

t 18
D

127
SPL

t 515
CONV
CKS0
0
1
0
1
Pφ
ADTRG
Internal trigger signal
ADST

Figure 15.6 External Trigger Input Timing

CKS1 = 0
CKS0 = 1
Min. Typ. Max.

33 10 17
  
63

530 259 266
Conversion Time (Number of States)
512 (Fixed)
256 (Fixed)
128 (Fixed)
64 (Fixed)
CKS1 = 1
CKS0 = 0
Min. Typ. Max. Min. Typ. Max.

6 9 4
  
31

131 134 67
A/D conversion
CKS0 = 1

5

15

68