Location Of Register Information In Address Space - Renesas H8S/2319 series Hardware Manual

Renesas 16-bit single-chip microcomputer
Table of Contents

Advertisement

DTC vector
address
Figure 7-4 Correspondence between DTC Vector Address and Register Information
7.3.4

Location of Register Information in Address Space

Figure 7-5 shows how the register information should be located in the address space.
Locate the MRA, SAR, MRB, DAR, CRA, and CRB registers, in that order, from the start address
of the register information (contents of the vector address). In the case of chain transfer, register
information should be located in consecutive areas.
Locate the register information in the on-chip RAM (addresses: H'FFF800 to H'FFFBFF).
Register
information
start address
Chain
transfer
Figure 7-5 Location of DTC Register Information in Address Space
Rev. 5.00, 12/03, page 200 of 1088
Register information
start address
Lower address
0
1
MRA
MRB
CRA
MRA
MRB
CRA
4 bytes
Next transfer
2
3
SAR
DAR
CRB
SAR
DAR
CRB
Register information
Register information
Register information
for 2nd transfer in
chain transfer

Advertisement

Table of Contents
loading

This manual is also suitable for:

H8s/2318 series

Table of Contents