Clock Divider Status Sfrs - Samsung S5PC110 Manual

S5PC110_UM

3.7.7 CLOCK DIVIDER STATUS SFRS

3.7.7.1 Clock Divider Status SFRs (CLK_DIV_STAT0, R, Address = 0xE010_1000)
CLK_DIV_STAT0
DIV_UART3
DIV_UART2
DIV_UART1
DIV_UART0
DIV_MMC3
DIV_MMC2
DIV_MMC1
DIV_MMC0
Reserved
DIV_FIMC_LCLK
Reserved
DIV_MFC
DIV_G3D
DIV_CSIS
Reserved
DIV_FIMD
DIV_CAM1
DIV_CAM0
DIV_FIMC
Reserved
DIV_TBLK
DIV_PCLK_PSYS
DIV_HCLK_PSYS
DIV_PCLK_DSYS
DIV_HCLK_DSYS
DIV_PCLK_MSYS
DIV_HCLK_MSYS
DIV_A2M
DIV_APLL
Bit
[31] DIVUART3 status (0: stable, 1: divider is changing)
[30] DIVUART2 status (0: stable, 1: divider is changing)
[29] DIVUART1 status (0: stable, 1: divider is changing)
[28] DIVUART0 status (0: stable, 1: divider is changing)
[27] DIVMMC3 status (0: stable, 1: divider is changing)
[26] DIVMMC2 status (0: stable, 1: divider is changing)
[25] DIVMMC1 status (0: stable, 1: divider is changing)
[24] DIVMMC0 status (0: stable, 1: divider is changing)
[23] Reserved
[22] DIVFIMC_LCLK status (0: stable, 1: divider is changing)
[21:18] Reserved
[17] DIVMFC status (0: stable, 1: divider is changing)
[16] DIVG3D status (0: stable, 1: divider is changing)
[15] DIVCSIS status (0: stable, 1: divider is changing)
[14] Reserved
[13] DIVFIMD status (0: stable, 1: divider is changing)
[12] DIVCAM1 status (0: stable, 1: divider is changing)
[11] DIVCAM0 status (0: stable, 1: divider is changing)
[10] DIVFIMC status (0: stable, 1: divider is changing)
[9] Reserved
[8] DIVTBLK status (0: stable, 1: divider is changing)
[7] DIVPCLKP status (0: stable, 1: divider is changing)
[6] DIVHCLKP status (0: stable, 1: divider is changing)
[5] DIVPCLKD status (0: stable, 1: divider is changing)
[4] DIVHCLKD status (0: stable, 1: divider is changing)
[3] DIVPCLKM status (0: stable, 1: divider is changing)
[2] DIVHCLKM status (0: stable, 1: divider is changing)
[1] DIVA2M status (0: stable, 1: divider is changing)
[0] DIVAPLL status (0: stable, 1: divider is changing)
Description
3 CLOCK CONTROLLER
Initial State
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3-53