Samsung S5PC110 Manual page 580

S5PC110_UM 1 DRAM CONTROLLER
Delay line programming value; tDL ≈ t AC + 2*(tB+tC+tD).
tDL = tF (ctrl_shiftc[2:0]) + tV (ctrl_offsetc[6:0])
If ctrl_shiftc[2:0] is 3'b100, tF is Tperiod/8 ≈ 0.9375ns. (If tCK is 7.5ns)
If ctrl_offsetc[6:0] is 7'b00010_00, tV is 0.320ns(40ps * 8) @ worst case (if tFS = 40ps)
Therefore tDL = tF + tV = 0.9375ns + 0.320ns = 1.2575ns
Figure 1-13 DQS Cleaning for LPDDR if tAC Min
Figure 1-14 DQS Cleaning for LPDDR if tAC Max
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