Register Description; Register Map - Samsung S5PC110 Manual

S5PC110_UM

3.4 REGISTER DESCRIPTION

3.4.1 REGISTER MAP

Register
CH_CFG0
CLK_CFG0
MODE_CFG0
CS_REG0
SPI_INT_EN0
SPI_STATUS0
SPI_TX_DATA0
SPI_RX_DATA0
PACKET_CNT_REG0
PENDING_CLR_REG0
SWAP_CFG0
FB_CLK_SEL0
CH_CFG1
CLK_CFG1
MODE_CFG1
CS_REG1
SPI_INT_EN1
SPI_STATUS1
SPI_TX_DATA1
SPI_RX_DATA1
PACKET_CNT_REG1
PENDING_CLR_REG1
Address R/W
0xE1300000 R/W
0xE1300004 R/W
0xE1300008 R/W
0xE130000C R/W
0xE1300010 R/W
0xE1300014 R
0xE1300018 W
0xE130001C R
0xE1300020 R/W
0xE1300024 R/W
0xE1300028 R/W
0xE130002C R/W
0xE1400000 R/W
0xE1400004 R/W
0xE1400008 R/W
0xE140000C R/W
0xE1400010 R/W
0xE1400014 R
0xE1400018 W
0xE140001C R
0xE1400020 R/W
0xE1400024 R/W
Description
Specifies the SPI Port 0 Configuration
Register
Specifies the SPI Port 0 Clock Configuration
Register
Specifies the SPI Port 0 FIFO Control
Register
Specifies the SPI Port 0 Slave Selection
Control Register
Specifies the SPI Port 0 Interrupt Enable
Register
Specifies the SPI Port 0 Status Register
Specifies the SPI Port 0 TX Data Register
Specifies the SPI Port 0 RX Data Register
Specifies the SPI Port 0 Packet Count
Register
Specifies the SPI Port 0 Interrupt Pending
Clear Register
Specifies the SPI Port 0 Swap Config
Register
Specifies the SPI Port 0 Feedback Clock
Selection Register
Specifies the SPI Port 1 Configuration
Register
Specifies the SPI Port 1 Clock Configuration
Register
Specifies the SPI Port 1 SPI FIFO Control
Register
Specifies the SPI Port 1 Slave Selection
Control Register
Specifies the SPI Port 1 Interrupt Enable
Register
Specifies the SPI Port 1 Status Register
Specifies the SPI Port 1 TX Data Register
Specifies the SPI Port 1 RX Data Register
Specifies the SPI Port 1 Packet Count
Register
Specifies the SPI Port 1 Interrupt Pending
Clear Register
3 SERIAL PERIPHERAL INTERFACE
Reset Value
0x0
0x0
0x0
0x1
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x1
0x0
0x0
0x0
0x0
0x0
0x0
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