Samsung S5PC110 Manual page 239

S5PC110_UM
2.2.55.78 GPIO Interrupt Control Registers (GPF2_INT_MASK, R/W, Address = 0xE020_092C)
GPF2_INT_MASK
Reserved
GPF2_INT_MASK[7]
GPF2_INT_MASK[6]
GPF2_INT_MASK[5]
GPF2_INT_MASK[4]
GPF2_INT_MASK[3]
GPF2_INT_MASK[2]
GPF2_INT_MASK[1]
GPF2_INT_MASK[0]
2.2.55.79 GPIO Interrupt Control Registers (GPF3_INT_MASK, R/W, Address = 0xE020_0930)
GPF3_INT_MASK
Reserved
GPF3_INT_MASK[5]
GPF3_INT_MASK[4]
GPF3_INT_MASK[3]
GPF3_INT_MASK[2]
GPF3_INT_MASK[1]
GPF3_INT_MASK[0]
Bit
[31:8] Reserved
[7] 0 = Enables Interrupt
1 = Masked
[6] 0 = Enables Interrupt
1 = Masked
[5] 0 = Enables Interrupt
1 = Masked
[4] 0 = Enables Interrupt
1 = Masked
[3] 0 = Enables Interrupt
1 = Masked
[2] 0 = Enables Interrupt
1 = Masked
[1] 0 = Enables Interrupt
1 = Masked
[0] 0 = Enable Interrupt
1 = Masked
Bit
[31:6] Reserved
[5] 0 = Enables Interrupt
1 = Masked
[4] 0 = Enables Interrupt
1 = Masked
[3] 0 = Enables Interrupt
1 = Masked
[2] 0 = Enables Interrupt
1 = Masked
[1] 0 = Enables Interrupt
1 = Masked
[0] 0 = Enables Interrupt
1 = Masked
2 GENERAL PURPOSE INPUT/ OUTPUT
Description
Description
Initial State
0
1
1
1
1
1
1
1
1
Initial State
0
1
1
1
1
1
1
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