Samsung S5PC110 Manual page 446

Risc microprocessor
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S5PC110_UM
5.5.2.27 IEC Integration Test Input Read or Set Registers (IECITIP1, R/W, Address = 0xE080_0F10)
IECITIP1
-
IECSYNCMODEACK
IECDPMCLKEN
IECDVSEMCLKEN
IECCPUWFIACK
IECMAXPERF
Bit
[31:5]
Reserved. Unpredictable when read. Should be written as
zero.
[4]
Intra-chip input.
Writes to this bit, set the value to be driven onto the input
IECSYNCMODEACK, in the integration test mode.
Reads return the value of the IECSYNCMODEACK input at
the output of the test multiplexer.
The reset value is 0.
[3]
Intra-chip input.
Writes to this bit, set the value to be driven onto the input
IECDPMCLKEN, in the integration test mode.
Reads return the value of the IECDPMCLKEN input at the
output of the test multiplexer.
The reset value is 0.
[2]
Intra-chip input.
Writes to this bit set the value to be driven onto the input
IECDVSEMCLKEN, in the integration test mode.
Reads return the value of the IECDVSEMCLKEN input at the
output of the test multiplexer.
The reset value is 0.
[1]
Intra-chip input.
Writes to this bit set the value to be driven onto the input
IECCPUWFIACK, in the integration test mode.
Reads return the value of the IECCPUWFIACK input at the
output of the test multiplexer.
The reset value is 0.
[0]
Intra-chip input.
Writes to this bit set the value to be driven onto the input
IECMAXPERF, in the integration test mode.
Reads return the value of the IECMAXPERF input at the
output of the test multiplexer.
The reset value is 0.
5 INTELLIGENT ENERGY MANAGEMENT
Description
Initial State
0
0
0
0
0
0
5-29

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