Port Group Etc0 Control Register - Samsung S5PC110 Manual

Risc microprocessor
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S5PC110_UM

2.2.50 PORT GROUP ETC0 CONTROL REGISTER

There are two control registers, namely, ETC0PUD and ETC0DRV.
ETC0 ports are dedicated as shown in table below:
ETC0
Pin Name
ETC0[0]
XjTRSTn
ETC0[1]
XjTMS
ETC0[2]
XjTCK
ETC0[3]
XjTDI
ETC0[4]
XjTDI
ETC0[5]
XjDBGSEL
2.2.50.1 Port Group ETC0 Control Register (ETC0PUD, R/W, Address = 0xE020_0608)
ETC0PUD
ETC0PUD
ETC0PUD[m]
2.2.50.2 Port Group ETC0 Control Register (ETC0DRV, R/W, Address = 0xE020_060C)
ETC0DRV
ETC0DRV[n]
JTAG TAP Controller Reset
JTAG TAP Controller Mode Select
JTAG TAP Controller Clock
JTAG TAP Controller Data Input
JTAG TAP Controller Data Input
JTAG selection(0: CORTEXA8 Core JTAG, 1: Peripherals
JTAG)
Bit
[2n+1:2n]
00 = Pull-up/ down disabled
01 = Pull-down enabled
n=4~5
10 = Pull-up enabled
11 = Reserved
[2m+1:2m]
Reserved (fixed)
ETC0PUD[0] : Pull-down
m=0~3
ETC0PUD[1] : Pull-up
ETC0PUD[2] : Pull-down
ETC0PUD[3] : Pull-up
Bit
[2n+1:2n]
00 = 1x
10 = 2x
n=0~5
01 = 3x
11 = 4x
2 GENERAL PURPOSE INPUT/ OUTPUT
Description
Description
Description
Initial State
0
0
0
0
0
0
Initial State
0x00
0x00
Initial State
0x0000
2-119

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