Samsung S5PC110 Manual page 535

S5PC110_UM
1.4.1.32 Peripheral Identification Register
(TZICPeriphID1, R, Address=0xF280_0FE4, 0xF290_0FE4, 0xF2A0_0FE4, 0xF2B0_0FE4)
TZICPeriphID1
-
Designer0
Partnumber1
1.4.1.33 Peripheral Identification Register
(TZICPeriphID2, R, Address=0xF280_0FE8, 0xF290_0FE8, 0xF2A0_0FE8, 0xF2B0_0FE8)
TZICPeriphlD2
-
Revision
Designer1
1.4.1.34 Peripheral Identification Register
(TZICPeriphID3, R, Address=0xF280_0FEC, 0xF290_0FEC, 0xF2A0_0FEC, 0xF2B0_0FEC)
TZICPeriphID3
-
Configuration
1.4.1.35 Identification Register
(TZICPCellID0, R, Address=0xF280_0FF0, 0xF290_0FF0, 0xF2A0_0FF0, 0xF2B0_0FF0)
TZICPCellID0
-
TZICPCellID0
1.4.1.36 Identification Register
(TZICPCellID1, R, Address=0xF280_0FF4, 0xF290_0FF4, 0xF2A0_0FF4, 0xF2B0_0FF4)
TZICPCellID1
-
TZICPCellID1
Bit
[31:8] Read undefined
[7:4] These bits read back as 0x1
[3:0] These bits read back as 0x8
Bit
[31:8] Read undefined
[7:4] These bits read back as the revision number and can be
between 0 and 15
[3:0] These bits read back as 0x4
Bit
[31:8] Read undefined
[7:0] These bits read back as 0x00
Bit
[31:8] Read undefined
[7:0] These bits read back as 0x0D
Bit
[31:8] Read undefined
[7:0] These bits read back as 0xF0
1 VECTORED INTERRUPT CONTROLLER
Description
Description
Description
Description
Description
Initial State
0x0
0x1
0x8
Initial State
0x0
0x0
0x4
Initial State
0x0
0x0
Initial State
0x0
0x0D
Initial State
0x0
0xF0
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