Figure 3-4 Clkout Waveform With Dclk Divider - Samsung S5PC110 Manual

S5PC110_UM
CLK_OUT Bit
DCLKSEL [3:1]
DCLKEN [0]
CLKOUT frequency = CLKIN (selected by CLKSEL) frequency / (DIVVAL+1)
Select DCLK source clock
(000: XXTI, 001: XUSBXTI, 010: SCLK_HDMI27M, 011:
SCLK_USBPHY0, 100: SCLK_USBPH1, 101: SCLK_HDMIPHY,
110: FOUTMPLL/2, 111: SCLKEPLL)
Enable DCLK (0:disable, 1:enable)
Figure 3-4 CLKOUT Waveform with DCLK Divider
Description
3 CLOCK CONTROLLER
Initial State
0
0
3-52