Clock Declaration; Clocks From Clock Pads - Samsung S5PC110 Manual

S5PC110_UM

3.2 CLOCK DECLARATION

shows the classification of clocks in S5PC110. The top-level clocks in S5PC110 include:
Figure 3-2
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Clocks from clock pads, that is, XRTCXTI, XXTI, XUSBXTI, and XHDMIXTI.
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Clocks from CMU (for instance, ARMCLK, HCLK, PCLK, and so on.)
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Clocks from USB OTG PHY
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Clocks from GPIO pads

3.2.1 CLOCKS FROM CLOCK PADS

The following clocks are provided by clock pads. However, you can disable crystal clock pads.
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XRTCXTI: Specifies a clock from 32.768 KHz crystal pad with XRTCXTI and XRTCXTO pins. RTC uses this
clock as the source of a real-time clock.
•
XXTI: Specifies a clock from crystal pad with XXTI and XXTO pins. When USB PHY is not used in commercial
set, CMU and PLL use this clock to generate other clocks to modules (APLL, MPLL, VPLL, and EPLL.). The
input frequency ranges from 12 ~ 50 MHz.
•
XUSBXTI: Specifies a clock from a crystal pad with XUSBXTI and XUSBXTO pins. This clock is supplied to
APLL, MPLL, VPLL, ELL, and USB PHY. For more information on USB PHY clock, refer to Chapter 8.4 " USB
2.0 HOST Controller " and 8.5 " USB2.0 HS OTG ".
•
XHDMIXTI: Specifies a clock from 27MHz crystal pad with XHDMIXTI and XHDMIXTO pins. VPLL or HDMI
PHY generates 54MHz clock for TV encoder.
Figure 3-2 S5PC110 Top-Level Clocks
3 CLOCK CONTROLLER
3-2