Samsung S5PC110 Manual page 661

S5PC110_UM
4.5.2.5 Data Register (NFDATA, R/W, Address = 0xB0E0_0010)
NFDATA
NFDATA [31:0]
4.5.2.6 Main Data Area ECC Register (NFMECCD0, R/W, Address = 0xB0E0_0014)
NFMECCD0
Reserved [31:24]
ECCData1 [23:16]
(ECC1)
Reserved [15:8]
ECCData0 [7:0]
(ECC0)
NOTE: Only word access is allowed.
4.5.2.7 Main Data Area ECC Register (NFMECCD0, R/W, Address = 0xB0E0_0018)
NFMECCD1
Reserved [31:24]
ECCData3 [23:16]
(ECC3)
Reserved
ECCData2
(ECC2)
Bit
NAND Flash read/ program data value for I/O
Note: For more information, refer to
in page 4-4.
Configuration
Bit
Reserved
nd
2 ECC
Note: In software mode, read this register when you need to
nd
read 2 ECC value from NAND Flash memory
Reserved
st
1 ECC
Note: In software mode, read this register when you need to
st
read 1 ECC value from NAND flash memory. This register has
the same read function as NFDATA.
Bit
Reserved
th
4 ECC
Note: In software mode, read this register when you need to
th
read 4 ECC value from NAND Flash memory
[15:8] Reserved
rd
[7:0]
3 ECC
Note: In software mode, read this register when you need to
rd
read 3 ECC value from NAND Flash memory. This register
has the same read function as NFDATA.
Description
4.3.1 Data Register
Description
Description
4 NAND FLASH CONTROLLER
Initial State
0x00000000
Initial State
0x00
0x00
0x00
0x00
Initial State
0x00
0x00
0x00
0x00
4-20