Block Diagram Of Compact Flash Controller; Functional Description - Samsung S5PC110 Manual

S5PC110_UM

5.3 BLOCK DIAGRAM OF COMPACT FLASH CONTROLLER

5.4 FUNCTIONAL DESCRIPTION

The ATAPI controller is compatible with the ATA/ATAPI-5 standard. This mode allows I/O operations to the task
file and data registers. It has access to one FIFO that is 16X32-bit. The ATAPI controller has internal DMA
controller for data transfer between ATA device and memory. The ATAPI controller has 32 word-sized (32-bits)
Special Function Registers.
The ATAPI controller directly accesses the system RAM when it implements MDMA and UDMA data transfer.
Therefore, there are three operating modes called PIO, MDMA, and UDMA in the ATA controller. The signal
timing depends on the transfer class and its modes. The ATA host controller supports several classes PIO,
MDMA, and UDMA. They have various modes according to transfer data rate. The PIO class has five modes. The
maximum transfer rate is mode 4. The MDMA has 3 modes, the maximum data rate is 16.7MB/s. The maximum
transfer rates supported for the UDMA is mode 4(66MB/s).
This ATAPI controller does not supported the ATA special driver(IO PAD) for UDMA. So user has to use the ATA
cable which is shorter than 10cm.
AHB
FIFO
Master
Internal
Control
AHB
Slave
Figure 5-1 Block Diagram of Compact Flash Controller
ATA
Interface
Logic
Interrupt
Control
ATA Controller
5 COMPACT FLASH CONTROLLER
ATA
Device
5-2