Samsung S5PC110 Manual page 938

S5PC110_UM
5.8.6.3 Host Channel-n Interrupt Register (HCINTn, R/W, Address = 0xEC00_0508+n*20h)
Channel_number: 0 ≤ n ≤ 15
This register indicates the status of a channel with respect to USB- and AHB-related events. The application must
read this register if the Host Channels Interrupt bit of the Core Interrupt register is set. Before the application reads
this register, it must first read the Host All Channels Interrupt register to get the exact channel number for the Host
Channel-n Interrupt register. The application must clear the appropriate bit in this register to clear the
corresponding bits in the HAINT and GINTSTS registers.
HCINTn Bit
Reserved [31:11] -
DataTglErr [10]
FrmOvrun [9]
BblErr [8]
XactErr [7]
NYET [6]
ACK [5]
NAK [4]
STALL [3]
AHBErr [2]
ChHltd [1]
XferCompl [0]
Description
Data Toggle Error
Frame Overrun
Babble Error
Transaction Error
NYET Response Received Interrupt
ACK Response Received Interrupt
NAK Response Received Interrupt
STALL Response Received Interrupt
AHB Error
This is generated only in Internal DMA mode if there is
an AHB error during AHB read/ writes. The application
reads the corresponding channel's DMA address
register to get the error address.
Channel Halted
Indicates the incomplete transfer either because of any
USB transaction error or in response to disable request
by the application.
Transfer Completed
Transfer completed normally without any errors.
5 USB2.0 HS OTG
R/W Initial State
- 21'h0
R_SS_WC 1'b0
R_SS_WC 1'b0
R_SS_WC 1'b0
R_SS_WC 1'b0
R_SS_WC 1'b0
R_SS_WC 1'b0
R_SS_WC 1'b0
R_SS_WC 1'b0
R_SS_WC 1'b0
R_SS_WC 1'b0
R_SS_WC 1'b0
5-62