Samsung S5PC110 Manual page 116

S5PC110_UM
2.2.19.4 Port Group GPI Control Register (GPIDRV, R/W, Address = 0xE020_022C)
GPIDRV
GPIDRV[n]
2.2.19.5 Port Group GPI Control Register (GPICONPDN, R/W, Address = 0xE020_0230)
GPICONPDN
GPI[n]
2.2.19.6 Port Group GPI Control Register (GPIPUDPDN, R/W, Address = 0xE020_0234)
GPIPUDPDN
GPI[n]
For GPI PDN control in power down mode, PAD_PDN_CTRL Register of GPI is at AUDIO_SS.
For more information, refer to Chapter 10.01, Low Power Audio Subsystem.
Bit
[2n+1:2n] 00 = 1x
10 = 2x
n=0~6
01 = 3x
11 = 4x
Bit
[2n+1:2n] Reserved (Controlled by PAD_CON_CTRL register at
AUDIO_SS)
n=0~6
Bit
[2n+1:2n] Reserved (Controlled by GPIPUD register)
n=0~6
2 GENERAL PURPOSE INPUT/ OUTPUT
Description
Description
Description
Initial State
0x0000
Initial State
0x00
Initial State
0x00
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