Samsung S5PC110 Manual page 698

S5PC110_UM
5.11.2.25 ATA PIO Data Ready Register (ATA_PIO_READY, R, Address = 0xE820_0078)
ATA_PIO_READY
Reserved
dev_acc_ready
pio_data_ready
5.11.2.26 ATA PIO Read Data Register (ATA_PIO_RDATA, R, Address = 0xE820_007C)
ATA_PIO_RDATA
Reserved
pio_rdata
5.11.2.27 AHB Bus FIFO Status Register (BUS_FIFO_STATUS, R, Address = 0xE820_0080)
BUS_FIFO_STATUS
Reserved
bus_state[2:0]
Reserved
bus_fifo_rdpnt
Reserved
bus_fifo_wrpnt
Bit
[31:2] Reserved
[1] Indicates whether host can start access to device register
0 = Not ready to start access ATA device register
1 = Ready to start access ATA device register
[0] Indicates whether data is valid in ATA_PIO_DATA
register
0 = No valid data in ATA_PIO_DATA register
1 = Valid data in ATA_PIO_DATA register
Bit
[31:16] Reserved
[15:0] PIO read data register while HOST read from ATA
device register
Bit
[31:19] Reserved
[18:16] 3'b000 = IDLE
3'b001 = BUSYW
3'b010 = PREP
3'b011 = BUSYR
3'b100 = PAUSER
3'b101 = PAUSEW
3'b110 = PAUSER2
[15:14] Reserved
[13:8] Bus FIFO read pointer
[7:6] Reserved
[5:0] Bus FIFO write pointer
Description
Description
Description
5 COMPACT FLASH CONTROLLER
R/W Initial State
R
R
R
R/W Initial State
R
R
R/W Initial State
R
R
R
R
R
R
0x0
0x1
0x1
0x0
0x0000
0x0
0x00
0x0
0x00
0x0
0x00
5-26