Samsung S5PC110 Manual page 962

Risc microprocessor
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S5PC110_UM
DIEPINTn/
Bit
DOEPINTn
TxFEmp
[7]
INEPNakEff
[6]
Back2Back
SETup
INTknEPMis
[5]
StsPhseRcvd
INTknTXFEmp
[4]
Transmit FIFO Empty
This bit is valid only for IN Endpoints This interrupt is
asserted when the TxFIFO for this endpoint is either half or
completely empty.
The half or completely empty status is determined by the
TxFIFO Empty Level bit in the Core AHB Configuration
register (GAHBCFG.NPTxFEmpLvl)).
IN Endpoint NAK Effective
Applies to periodic IN endpoints only.
This bit can be cleared when the application clears the IN
endpoint NAK by writing to DIEPCTLn.CNAK. This interrupt
indicates that the core has sampled the NAK bit set (either
by the application or by the core). The interrupt indicates
that the IN endpoint NAK bit set by the application has taken
effect in the core. This interrupt does not guarantee that a
NAK handshake is sent on the USB. A STALL bit takes
priority over a NAK bit.
Back-to-Back SETUP Packets Receive
Applies to Control OUT endpoints only.
This bit indicates that the core has received more than three
back-to-back SETUP packets for this particular endpoint.
For information about handling this interrupt,
IN Token Received with EP Mismatch
Applies to non-periodic IN endpoints only.
Indicates that the data in the top of the non-periodic TxFIFO
belongs to an endpoint other than the one for which the IN
token was received. This interrupt is asserted on the
endpoint for which the IN token was received.
Status Phase Received For Control Write
This interrupt is valid only for Control OUT endpoints and
only in Scatter Gather DMA mode.
This interrupt is generated only after the core has
transferred all the data that the host has sent during the data
phase of a control write transfer, to the system memory
buffer. The interrupt indicates to the application that the host
has switched from data phase to the status phase of a
Control Write transfer. The application can use this interrupt
to ACK or STALL the Status phase, after it has decoded the
data phase. This is applicable only in case of Scatter Gather
DMA mode.
IN Token Received When TxFIFO is Empty
Applies to non-periodic IN endpoints only. Indicates that an
IN token was received when the associated TxFIFO
(periodic/non-periodic) was empty. This interrupt is asserted
on the endpoint for which the IN token was received.
Description
5 USB2.0 HS OTG
R/W
Initial State
R
1'b0
R/W
R_SS
1'b0
_WC
R_SS
1'b0
_WC
5-86

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