Samsung S5PC110 Manual page 534

Risc microprocessor
Table of Contents

Advertisement

S5PC110_UM
1.4.1.28 Protection Register
(TZICProtection, R/W, Address=0xF280_0018, 0xF290_0018, 0xF2A0_0018, 0xF2B0_0018)
TZICProtection
-
Protection
1.4.1.29 Lock Enable Register (TZICLock, W, Address=0xF280_001C, 0xF290_001C, 0xF2A0_001C,
0xF2B0_001C)
TZICLock
Lock
1.4.1.30 Lock Status Register
(TZICLockStatus, R, Address=0xF280_0020, 0xF290_0020, 0xF2A0_0020, 0xF2B0_0020)
TZICLockStatus
-
Locked
1.4.1.31 Peripheral Identification Register
(TZICPeriphID0, R, Address=0xF280_0FE0, 0xF290_0FE0, 0xF2A0_0FE0, 0xF2B0_0FE0)
TZICPeriphID0
-
Partnumber0
Bit
[31:1]
Read undefined. Write as 0.
[0]
Enables or disables protected register access:
0 = Disables Protection mode
1 = Enables Protection mode.
If enabled, you can only make privileged mode access
(reads and writes) to the TZIC. This register is accessed in
privileged mode, even if protection mode is disabled.
Bit
[31:0]
To enable access to the other registers in the TZIC, you
must write the correct access code of 0x0ACCE550 to this
register. To disable access to the other TZIC registers, you
must write any other value except 0x0ACCE550 to this
register.
Bit
[31:1]
Read undefined.
[0]
Shows the locked status of the TZIC:
0 = Access to the TZIC is not locked
1 = Access to the TZIC is locked
Use TZICLock Register to unlock the access
Bit
[31:8]
Read undefined
[7:0]
These bits read back as 0x90
1 VECTORED INTERRUPT CONTROLLER
Description
Description
Description
Description
Initial State
0x0
0x0
Initial State
-
Initial State
0x0
0x1
Initial State
0x0
0x90
1-27

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents