External Interrupt Control Registers - Samsung S5PC110 Manual

Risc microprocessor
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S5PC110_UM

2.2.60 EXTERNAL INTERRUPT CONTROL REGISTERS

External Interrupt consists of 32 bits. EXT_INT[31:0] are used for wake-up source in Power down mode. In idle
mode, all interrupts can be wake-up source; the other groups of external interrupts also can be the wake-up
sources.
EXT_INT[0] can be used PS_HOLD_CONTROL. For more information on PS_HOLD_CONTROL Register, refer
to Chapter 02.04. PMU.
The table below lists the external interrupt control registers.
2.2.60.1 External Interrupt Control Registers (EXT_INT_0_CON, R/W, Address = 0xE020_0E00)
EXT_INT_0_CON
Reserved
EXT_INT_0_CON[7]
Reserved
EXT_INT_0_CON[6]
Reserved
EXT_INT_0_CON[5]
Reserved
EXT_INT_0_CON[4]
Reserved
EXT_INT_0_CON[3]
Bit
[31]
Reserved
[30:28]
Sets the signaling method of EXT_INT[7]
000 = Low level
001 = High level
010 = Falling edge triggered
011 = Rising edge triggered
100 = Both edge triggered
101 ~ 111 = Reserved
[27]
Reserved
[26:24]
Sets the signaling method of EXT_INT[6]
000 = Low level
001 = High level
010 = Falling edge triggered
011 = Rising edge triggered
100 = Both edge triggered
101 ~ 111 = Reserved
[23]
Reserved
[22:20]
Sets the signaling method of EXT_INT[5]
000 = Low level
001 = High level
010 = Falling edge triggered
011 = Rising edge triggered
100 = Both edge triggered
101 ~ 111 = Reserved
[19]
Reserved
[18:16]
Sets the signaling method of EXT_INT[4]
000 = Low level
001 = High level
010 = Falling edge triggered
011 = Rising edge triggered
100 = Both edge triggered
101 ~ 111 = Reserved
[15]
Reserved
[14:12]
Sets the signaling method of EXT_INT[3]
000 = Low level
001 = High level
2 GENERAL PURPOSE INPUT/ OUTPUT
Description
Initial State
0
000
0
000
0
000
0
000
0
000
2-242

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