Samsung S5PC110 Manual page 637

Risc microprocessor
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S5PC110_UM
3.8.3.8 DMA Transfer Direction Register (DMA_TRANS_DIR, R/W, Address = 0xB060_0420)
DMA_TRANS_
Bit
DIR
-
[31:1]
TDIR
[0]
Reserved
Transfer Direction
This bit specifies the transfer direction of the DMA operation
between the OneNAND controller's internal AHB memory and the
OneNAND controller's external AHB memory.
0b = OneNAND controller read (Internal AHB memory to external
AHB memory)
1b = OneNAND controller write (External AHB memory to internal
AHB memory)
Description
3 ONENAND CONTROLLER
Initial State
-
0b
3-35

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