S5PC110_UM
1.2.2 SYNCHRONIZER CONFIGURATION REGISTER (ASYNC_CONFIG0~10, R/W)
ASYNC_CONFIG0~10
Reserved
HALF_SYNC_SEL
HALF_SYNC_SEL field of ASYNC_CONFIG0~10 registers decides whether to use half or full synchronization for
synchronizer, which separates two different clock domains. Setting this field to HIGH selects half synchronizer,
which has better performance over full synchronizer. On the contrary, full synchronizer has a better MTBF (Mean
Time Between Failure) resulting from crossing clock domains. It is recommended to use full synchronization for
stable operation.
Bit
[31:1]
Reserved
[0]
Use half synchronizer for asynchronous clock domain
crossing.
Description
1 BUS CONFIGURATION
Initial State
0x0
0x1
1-7