Samsung S5PC110 Manual page 416

Risc microprocessor
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S5PC110_UM
4.10.5.3 MISC Register (HDMI_CONTROL, R/W, Address = 0xE010_E804)
HDMI_CONTROL
Reserved
DIV_RATIO
Reserved
ENABLE
4.10.5.4 MISC Register (USB_PHY_CONTROL, R/W, Address = 0xE010_E80C)
USB_PHY_CONTROL
Reserved
ENABLE1
ENABLE0
4.10.5.5 MISC Register (DAC_CONTROL, R/W, Address = 0xE010_E810)
DAC_CONTROL
Reserved
ENABLE
4.10.5.6 MISC Register (MIPI_DPHY_CONTROL, R/W, Address = 0xE010_E814)
MIPI_DPHY_CONTROL
Reserved
M_RESETN
S_RESETN
ENABLE
Bit
[31:26]
Reserved
[25:16]
Clock divider ratio for HDMI
[15:1]
Reserved
[0]
HDMI PHY enable (0: disable, 1: enable)
Bit
[31:2]
Reserved
[1]
USB PHY1 Enable selection (0: disable, 1: enable)
[0]
USB PHY0 Enable selection (0: disable, 1: enable)
Bit
[31:1]
Reserved
[0]
DAC IP enable selection.
This bit must be set to 1 at the system initialization
step before data access from/to DAC begins.
Caution: If DAC is not used in your system, do not
touch this field. (0: disable, 1: enable)
Bit
[31:1]
Reserved
[2]
Isolate/Connect MIPI_PHY Master Logic from/to Link
0 : Isolate MIPI D-PHY Master Logic from DSI Link
1: Connect MIPI D-PHY Master Logic to DSI Link
[1]
Isolate/Connect MIPI_PHY Slave Logic from/to Link
0 : Isolate MIPI D-PHY Slave Logic from CSI Link
1: Connect MIPI D-PHY Slave Logic to CSI Link
[0]
MIPI_DPHY enable selection. This bit must be set to 1
at the system initialization step before data access
from/to MIPI_DPHY begins.
Caution: If MIPI_DPHY is not used in your system, do
not touch this bit. (0: disable, 1: enable)
Description
Description
Description
Description
4 POWER MANAGEMENT
Initial State
0x00
0x96
0x0000
0
Initial State
0x0000_0000
0
0
Initial State
0x0000_0000
0
Initial State
0x0000_0000
0
0
0
4-56

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