Samsung S5PC110 Manual page 49

S5PC110_UM
Pin Name GPIO
XEINT[30] GPH3[6]
XEINT[31] GPH3[7]
Xi2s0SCLK GPI[0]
Xi2s0CDCLK GPI[1]
Xi2s0LRCK GPI[2]
Xi2s0SDI GPI[3]
Xi2s0SDO[0] GPI[4]
Xi2s0SDO[1] GPI[5]
Xi2s0SDO[2] GPI[6]
XmsmADDR[0] GPJ0[0]
XmsmADDR[1] GPJ0[1]
XmsmADDR[2] GPJ0[2]
XmsmADDR[3] GPJ0[3]
XmsmADDR[4] GPJ0[4]
XmsmADDR[5] GPJ0[5]
XmsmADDR[6] GPJ0[6]
XmsmADDR[7] GPJ0[7]
XmsmADDR[8] GPJ1[0]
XmsmADDR[9] GPJ1[1]
XmsmADDR[10] GPJ1[2]
XmsmADDR[11] GPJ1[3]
XmsmADDR[12] GPJ1[4]
XmsmADDR[13] GPJ1[5]
XmsmDATA[0] GPJ2[0]
XmsmDATA[1] GPJ2[1]
XmsmDATA[2] GPJ2[2]
XmsmDATA[3] GPJ2[3]
XmsmDATA[4] GPJ2[4]
XmsmDATA[5] GPJ2[5]
Func0 Func1
KP_ROW[6]
KP_ROW[7]
I2S_0_SCLK PCM_0_SCLK
I2S_0_CDCLK PCM_0_EXTCLK
I2S_0_LRCK PCM_0_FSYNC
I2S_0_SDI PCM_0_SIN
I2S_0_SDO[0] PCM_0_SOUT
I2S_0_SDO[1]
I2S_0_SDO[2]
MSM_ADDR[0] CAM_B_DATA[0]
MSM_ADDR[1] CAM_B_DATA[1]
MSM_ADDR[2] CAM_B_DATA[2]
MSM_ADDR[3] CAM_B_DATA[3]
MSM_ADDR[4] CAM_B_DATA[4]
MSM_ADDR[5] CAM_B_DATA[5]
MSM_ADDR[6] CAM_B_DATA[6]
MSM_ADDR[7] CAM_B_DATA[7]
MSM_ADDR[8] CAM_B_PCLK
MSM_ADDR[9] CAM_B_VSYNC
MSM_ADDR[10] CAM_B_HREF
MSM_ADDR[11] CAM_B_FIELD
MSM_ADDR[12] CAM_B_CLKOUT
MSM_ADDR[13] KP_COL[0]
MSM_DATA[0] KP_COL[1]
MSM_DATA[1] KP_COL[2]
MSM_DATA[2] KP_COL[3]
MSM_DATA[3] KP_COL[4]
MSM_DATA[4] KP_COL[5]
MSM_DATA[5] KP_COL[6]
Func2 Func3
MIPI_BYT
CF_ADDR[0]
E_CLK
MIPI_ESC
CF_ADDR[1]
_CLK
CF_ADDR[2] TS_CLK
CF_IORDY TS_SYNC
CF_INTRQ TS_VAL
CF_DMARQ TS_DATA
TS_ERRO
CF_DRESETN
R
CF_DMACKN MHL_D0
SROM_ADDR_1
MHL_D1
6to22[0]
SROM_ADDR_1
MHL_D2
6to22[1]
SROM_ADDR_1
MHL_D3
6to22[2]
SROM_ADDR_1
MHL_D4
6to22[3]
SROM_ADDR_1
MHL_D5
6to22[4]
SROM_ADDR_1
MHL_D6
6to22[5]
CF_DATA[0] MHL_D7
CF_DATA[1] MHL_D8
CF_DATA[2] MHL_D9
CF_DATA[3] MHL_D10
CF_DATA[4] MHL_D11
CF_DATA[5] MHL_D12
2 GENERAL PURPOSE INPUT/ OUTPUT
@Reset Sleep
Default
PUD I/O State
GPI PD I(L)
GPI PD I(L)
Func0 PD O(L)
Func0 PD O(L)
Func0 PD O(L)
Func0 PD I(L)
Func0 PD O(L)
Func0 PD O(L)
Func0 PD O(L)
GPI PD I(L)
GPI PD I(L)
GPI PD I(L)
GPI PD I(L)
GPI PD I(L)
GPI PD I(L)
GPI PD I(L)
GPI PD I(L)
GPI PD I(L)
GPI PD I(L)
GPI PD I(L)
GPI PD I(L)
GPI PD I(L)
GPI PD I(L)
GPI PD I(L)
GPI PD I(L)
GPI PD I(L)
GPI PD I(L)
GPI PD I(L)
GPI PD I(L)
Pad Type
B1 PBIDIR_ALV
B1 PBIDIR_ALV
A1 PBIDIRSE_G
A1 PBIDIRSE_G
A1 PBIDIRSE_G
A1 PBIDIRSE_G
A1 PBIDIRSE_G
A1 PBIDIRSE_G
A1 PBIDIRSE_G
A5 PBIDIRSE_G
A5 PBIDIRSE_G
A5 PBIDIRSE_G
A5 PBIDIRSE_G
A5 PBIDIRSE_G
A5 PBIDIRSE_G
A5 PBIDIRSE_G
A5 PBIDIRSE_G
A5 PBIDIRSE_G
A5 PBIDIRSE_G
A5 PBIDIRSE_G
A5 PBIDIRSE_G
A5 PBIDIRSE_G
A5 PBIDIRSE_G
A5 PBIDIRSE_G
A5 PBIDIRSE_G
A5 PBIDIRSE_G
A5 PBIDIRSE_G
A5 PBIDIRSE_G
A5 PBIDIRSE_G
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