Samsung S5PC110 Manual page 530

S5PC110_UM
1.4.1.11 Software Priority Mask Register
(VICSWPRIORITYMASK, R/W, Address=0xF200_0024, 0xF210_0024, 0xF220_0024, 0xF230_0024)
VICSWPRIORITYMASK
Reserved
SWPriorityMask
1.4.1.12 Vector Address Registers
(VICVECTADDR[0-31], R/W, Address=0xF200_0100~017C, 0xF210_0100~017C, 0xF220_0100~017C,
0xF230_0100~017C)
VICVECTADDR[0-31]
VectorAddr 0-31
1.4.1.13 Vector Priority Registers (VICVECTPRIORITY[0-31] and VICVECTPRIORITYDAISY, R/W,
Address=0xF200_0200~027C, 0xF210_0200~027C, 0xF220_0200~027C, 0xF230_0200~027C)
VICVECTPRIORITY[0-31]
and
VICVECTPRIORITYDAISY
Reserved
VectPriority
1.4.1.14 VICPERIPHID0 Register
(VICPERIPHID0, R, Address=0xF200_0FE0, 0xF210_0FE0, 0xF220_0FE0, 0xF230_0FE0)
VICPERIPHID0
-
Partnumber0
Bit
[31:16] Reserved, read as 0, do not modify
[15:0] Controls software masking of the 16 interrupt priority levels:
0 = Interrupt priority level is masked
1 = Interrupt priority level is not masked
Each bit of the register is applied to each of the 16 interrupt
priority levels.
Bit
[31:0] Contains ISR vector addresses.
Bit
[31:4] Reserved, read as 0, do not modify.
[3:0] Selects vectored interrupt priority level. You can select
any of the 16 vectored interrupt priority levels by
programming the register with the hexadecimal value of
the priority level required, from 0-15.
Bit
[31:8] Reserved, read as 0, do not modify.
[7:0] These bits read back as 0x92
1 VECTORED INTERRUPT CONTROLLER
Description
Description
Description
Description
Initial State
0x0
0xFFFF
Initial State
0x00000000
Initial State
0x0
0xF
Initial State
0x0
0x92
1-23