Samsung S5PC110 Manual page 93

Risc microprocessor
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S5PC110_UM
2.2.9.2 Port Group GPE0 Control Register (GPE0DAT, R/W, Address = 0xE020_00E4)
GPE0DAT
GPE0DAT[7:0]
2.2.9.3 Port Group GPE0 Control Register (GPE0PUD, R/W, Address = 0xE020_00E8)
GPE0PUD
GPE0PUD[n]
2.2.9.4 Port Group GPE0 Control Register (GPE0DRV, S/W, Address = 0xE020_00EC)
GPE0DRV
GPE0DRV[n]
2.2.9.5 Port Group GPE0 Control Register (GPE0CONPDN, S/W, Address = 0xE020_00F0)
GPE0CONPDN
GPE0[n]
2.2.9.6 Port Group GPE0 Control Register (GPE0PUDPDN, S/W, Address = 0xE020_00F4)
GPE0PUDPDN
GPE0[n]
Bit
[7:0]
When the port is configured as input port, the corresponding
bit is the pin state. When the port is configured as output
port, the pin state is the same as the corresponding bit.
When the port is configured as functional pin, the undefined
value will be read.
Bit
[2n+1:2n]
00 = Pull-up/ down disabled
01 = Pull-down enabled
n=0~7
10 = Pull-up enabled
11 = Reserved
Bit
[2n+1:2n]
00 = 1x
10 = 2x
n=0~7
01 = 3x
11 = 4x
Bit
[2n+1:2n]
00 = Output 0
01 = Output 1
n=0~7
10 = Input
11 = Previous state
Bit
[2n+1:2n]
00 = Pull-up/ down disabled
01 = Pull-down enabled
n=0~7
10 = Pull-up enabled
11 = Reserved
2 GENERAL PURPOSE INPUT/ OUTPUT
Description
Description
Description
Description
Description
Initial State
0x00
Initial State
0x5555
Initial State
0x0000
Initial State
0x00
Initial State
0x00
2-58

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