Samsung S5PC110 Manual page 939

Risc microprocessor
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S5PC110_UM
5.8.6.4 Host Channel-n Interrupt Mask Register (HCINTMSKn, R/W, Address = 0xEC00_050C+n*20h)
Channel_number: 0 ≤ n ≤ 15
This register reflects the mask for each channel status described in the previous section.
Mask interrupt : 1'b0
Unmask interrupt : 1'b1
HCINTMSKn
Reserved
DataTglErrMsk
FrmOvrunMsk
BblErrMsk
XactErrMsk
NyetMsk
AckMsk
NakMsk
StallMsk
AHBErrMsk
ChHltdMsk
XferComplMsk
Bit
[31:11]
-
[10]
Data Toggle Error Mask
[9]
Frame Overrun Mask
[8]
Babble Error Mask
[7]
Transaction Error Mask
[6]
NYET Response Received Interrupt Mask
[5]
ACK Response Received Interrupt Mask
[4]
NAK Response Received Interrupt Mask
[3]
STALL Response Received Interrupt Mask
[2]
AHB Error Mask
[1]
Channel Halted Mask
[0]
Transfer Completed Mask
Description
5 USB2.0 HS OTG
R/W
Initial State
-
21'h0
R/W
1'b0
R/W
1'b0
R/W
1'b0
R/W
1'b0
R/W
1'b0
R/W
1'b0
R/W
1'b0
R/W
1'b0
R/W
1'b0
R/W
1'b0
R/W
1'b0
5-63

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