Samsung S5PC110 Manual page 207

Risc microprocessor
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S5PC110_UM
2.2.55.29 GPIO Interrupt Control Registers (GPC0_INT_FLTCON0, R/W, Address = 0xE020_0818)
GPC0_INT_FLTCON0
FLTEN4[3]
FLTWIDTH4[3]
FLTEN4[2]
FLTWIDTH4[2]
FLTEN4[1]
FLTWIDTH4[1]
FLTEN4[0]
FLTWIDTH4[0]
2.2.55.30 GPIO Interrupt Control Registers (GPC0_INT_FLTCON1, R/W, Address = 0xE020_081C)
GPC0_INT_FLTCON1
Reserved
FLTEN4[4]
FLTWIDTH4[4]
Bit
[31]
Filter Enable for GPC0_INT[3]
0 = Disables
1 = Enables
[30:24]
Filtering width of GPC0_INT[3]
This value is valid when FLTSEL4 is 1.
[23]
Filter Enable for GPC0_INT[2]
0 = Disables
1 = Enables
[22:16]
Filtering width of GPC0_INT[2]
This value is valid when FLTSEL4 is 1.
[15]
Filter Enable for GPC0_INT[1]
0 = Disables
1 = Enables
[14:8]
Filtering width of GPC0_INT[1]
This value is valid when FLTSEL4 is 1.
[7]
Filter Enable for GPC0_INT[0]
0 = Disables
1 = Enables
[6:0]
Filtering width of GPC0_INT[0]
This value is valid when FLTSEL4 is 1.
Bit
[31:8]
Reserved
[7]
Filter Enable for GPC0_INT[4]
0 = Disables
1 = Enables
[6:0]
Filtering width of GPC0_INT[4]
This value is valid when FLTSEL4 is 1.
2 GENERAL PURPOSE INPUT/ OUTPUT
Description
Description
Initial State
0
0
0
0
0
0
0
0
Initial State
0
0
0
2-172

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