S5PC110_UM
1 UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER
1.4 UART INPUT CLOCK DIAGRAM DESCRIPTION
Figure 1-8
Input Clock Diagram for UART
S5PC110 provides UART with a variety of clocks. As described in the
1-8, the UART is able to select
Figure
clocks from PCLK, or SCLK_UART, which is from clock controller. You can also select SCLK_UART from PLLs.
To select SCLK_UART, please refer to Section 2-3 Clock Controller.
1-10