Samsung S5PC110 Manual page 691

S5PC110_UM
5.11.2.1 ATA Software Reset (ATA_SWRST, R/W, Address = 0xE820_000C)
ATA_SWRST
Reserved
ata_swrst
5.11.2.2 ATA Interrupt Register (ATA_IRQ, R/W, Address = 0xE820_0010)
ATA_IRQ
Reserved
mdma_hold_int
sbuf_empty_int
tbuf_full_int
atadev_irq_int
udma_hold_int
xfr_done_int
Bit
[31:1] Reserved
[0] Software reset for the ATAPI host
0 = No reset
1 = Resets device registers and all registers of ATAPI
host controller except CPU interface registers.
After software reset, to continue transfer, user must
configure all registers of host controller and device
registers.
Bit
[31:6] Reserved
[5] If ATAPI device makes pending in MDMA class. CPU
clears this interrupt by writing "1".
[4] If source buffer is empty.
CPU clears this interrupt by writing "1".
[3] If track buffer is half-full.
CPU clears this interrupt by writing "1".
[2] If ATAPI device generates interrupt.
CPU clears this interrupt by writing "1".
[1] If ATAPI device makes early termination in UDMA class.
CPU clears this interrupt by writing "1".
[0] If all data transfers are complete.
CPU clears this interrupt by writing "1".
Description
Description
5 COMPACT FLASH CONTROLLER
R/W Initial State
R
R/W
R/W Initial State
R
R/W
R/W
R/W
R/W
R/W
R/W
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
5-19